Steffen Tarnick's research works | Universität Potsdam, Potsdam and other places
PDF) A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated Sequences
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PDF) Delay-Insensitive Cell Matrix.
Education and Information Technologies | Home
PDF) Detection of Delay Faults in Memory Address Decoders
Education and Information Technologies | Home
PDF) A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated Sequences
PDF) A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated Sequences
Education and Information Technologies | Home
PDF) A Low-Cost BIST Scheme for Test Vector Embedding in Accumulator-Generated Sequences
PDF) Efficient Test Compaction for Pseudo-Random Testing
PDF) Extending Internet into Space – ESA DTN Testbed Implementation and Evaluation
PDF) Test pattern generation based on arithmetic operations
NiDS2022 (Novel & Intelligent Digital Systems) - ATHENS
ERCIM News 96 by Peter Kunz - Issuu
PDF) Modeling and Simulation of Efficient March Algorithm for Memory Testing
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PDF) Arbitrary Two-Pattern Delay Testing Using a Low-Overhead Supply Gating Technique
Dimitris Magos's research works | University of West Attica, Athens (TEIATH) and other places
PDF) New Algorithms for Address Decoder Delay Faults and Bit Line Imbalance Faults
PDF) Accumulator-Based Weighted Pattern Generation.
PDF) Concurrent Self-Test with Partially Specified Patterns For Low Test Latency and Overhead
PDF) Moduli Set Selection and Cost Estimation for RNS-Based FIR Filter and Filter Bank Design
PDF) Test Embedding with Discrete Logarithms
